Comparison of Branching CORDIC Implementations

نویسندگان

  • Abhishek Singh
  • Dhananjay S. Phatak
  • Tom Goff
  • Mike Riggs
  • James F. Plusquellic
  • Chintan Patel
چکیده

In this paper we compare implementations of Duprat and Muller’s Branching CORDIC and Phatak’s Double Step Branching (DSB)–CORDIC algorithms for Sine and Cosine evaluation. For reference we also report on classical CORDIC implementations for the same wordlengths. We have also implemented Double Stepping in the classical algorithm and report on the performance of this method. CORDIC evaluation of Sine and Cosine includes two parts, the Zeroer and the Rotator. We discuss implementation issues related to the minimization of the delay of each iteration of the algorithm (including delays for both the Zeroer as well the Rotator). We then examine hybrid methods that select the components from different algorithms (such as a DSB Zeroer together with a classical rotator or vice versa). Index terms : Branching CORDIC, Implementations, Comparison This work was supported in part by NSF grants ECS-9875705 and ECS-0196362

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Comments on Duprat and Muller's Branching CORDIC Paper

In [1], Duprat and Muller introduced the ingenious “Branching CORDIC” algorithm. It enables a fast implementation of CORDIC algorithm using signed digits and requires a constant normalization factor. This correspondence corrects some errors in the original paper. All the page numbers quoted are from [1].

متن کامل

Double Step Branching CORDIC: A New Algorithm for Fast Sine and Cosine Generation

Duprat and Muller [1] introduced the ingenious “Branching CORDIC” algorithm. It enables a fast implementation of CORDIC algorithm using signed digits and requires a constant normalization factor. The speedup is achieved by performing two basic CORDIC rotations in parallel in two separate modules. In their method, both modules perform identical computation except when the algorithm is in a “bran...

متن کامل

Efficient implementations of pipelined CORDIC based IIR digital filters using fast orthonormal μ-rotations

CORDIC based IIR digital lters are orthogonal lters whose internal computations consist of orthogonal transformations. These lters possess desirable properties for VLSI implementations such as regularity, local connection, low sensitivity to nite word-length implementation, and elimination of limit cycles. Recently, ne-grain pipelined CORDIC based IIR digital lter architectures which can perfor...

متن کامل

Eecient Implementations of Pipelined Cordic Based Iir Digital Filters Using Fast Orthonormal -rotations

CORDIC based IIR digital lters possess desirable properties for VLSI implementations such as regularity, local connection, low sensitivity to nite word-length implementation, and elimination of limit cycles. Recently, ne-grain pipelined CORDIC based IIR digital lter architectures which can perform the ltering operations at arbitrarily high sample rates at the cost of linear increase in hardware...

متن کامل

High-speed CORDIC implementations using advanced circuit techniques

This paper presents results on using advanced domino circuit design techniques to implement a CORDIC processor. Skew-tolerant domino, enhanced precharged contention, nonblocking domino and pulsed reset domino circuit techniques are explained and applied to the implementation of this functional unit. For comparison purposes, a baseline design using standard two-phase domino with intermediate lat...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2003